High capacitance density highly reliable textured deep trench SiN capacitors toward 3D integration
Koga Saito, Ayano Yoshida, Rihito Kuroda, Hiroshi Shibata, Taku Shibaguchi, Naoya Kuriyama, Shigetoshi Sugawa
Abstract
Abstract We developed high capacitance density and highly reliable Si deep trench capacitors with textured surface and SiN dielectric film. The developed capacitor consists of parallel unit cells with 14.3 μ m depth textured surface trench capacitors, using Si wafer process compatible to 3D integration, realizing high scalability and versatility. Various fabrication conditions were experimented with to optimize the electrical characteristics. As a result, over 230 fF μ m −2 capacitance density and 9.0 V breakdown voltage were achieved. Regarding reliability, it has been confirmed that SiN dielectric film leads to below 10 −9 A cm −2 leakage current density at 1 V and the predicted lifetime of over 50 years at 3.3 V. For low voltage applications, higher capacitance density is available by using thinner SiN dielectric films.