0.55 W, 88%, 78 kHz, 48 V-to-5 V Fibonacci Hybrid DC–DC Converter IC Using 66 mm<sup>3</sup> of Passive Components With Automatic Change of Converter Topology and Duty Ratio for Cold-Crank Transient
Yoshitaka Yamauchi, Toru Sai, Katsuhiro Hata, Makoto Takamiya
Abstract
For 48 V mild hybrid vehicles, a sub-0.5 W, 48 V-to-5 V dc–dc converter fulfilling: 1) high efficiency with small volume; 2) constant switching frequency of less than 500 kHz to avoid the frequency band of AM radio; and 3) constant output voltage ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OUT</sub> ) against the sudden drop of input battery voltage ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">IN</sub> ) under cold cranking is required. To meet the requirements, a 0.55 W, 88%, 78 kHz, 48 V-to-5 V Fibonacci hybrid (FH) dc–dc converter IC using 66 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> of passive components is proposed. In the FH dc–dc converter, by adding an inductor and an output capacitor to a 1/5 Fibonacci switched-capacitor (SC) dc–dc converter, the SC dc–dc converter also works as a buck converter without adding power transistors. When <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">IN</sub> drops from 48 V to 20 V in 1 ms in the automotive cold cranking, the FH dc–dc converter cannot keep 5-V <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OUT</sub> , because the output voltage of the internal 1/5 SC dc–dc converter drops from 9.6 to 4 V and the internal buck converter cannot generate 5-V <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OUT</sub> from 4 V. To solve the problem, a new control method named automatic change of converter topology and duty ratio (ACCD) is proposed. In ACCD, when <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">IN</sub> drops less than 31 V, the converter topology automatically changes from 1/5 SC dc–dc converter to 1/3 SC dc–dc converter and the duty ratio of the pulsewidth modulation signal automatically decreases 3/5 times, thereby achieving the constant 5-V <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OUT</sub> under cold cranking. To reduce the volume of the FH dc–dc converter, all transistors and diodes, including ten power transistors, gate drivers, bootstrap circuits, and the controller, are fully integrated on 4.6 mm × 2.3 mm IC fabricated with 180 nm BCD process. In the measurements, the proposed 0.55 W, 48 V-to-5 V FH dc–dc converter IC achieved the highest efficiency (88%) with the smallest volume of passive components (66 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> ) at the lowest switching frequency (78 kHz) compared with previous publications.