Enhanced Security of DSP Circuits Using Multi-Key Based Structural Obfuscation and Physical-Level Watermarking for Consumer Electronics Systems
Anirban Sengupta, Mahendra Rathor
Abstract
Security of Digital Signal Processing (DSP) based Intellectual Property (IP) core is very important for the overall security and reliability of Consumer Electronics (CE) systems. These DSP based IP cores are highly vulnerable to threats such as reverse engineering (RE) leading to Trojan insertion, counterfeiting and cloning. Thus developing robust defense mechanisms is highly significant for these DSP circuits used in CE systems, especially to thwart the aforesaid threats. This article presents for the first time a double line of defense mechanism using robust multi-key based structural obfuscation integrated with tamper-tolerant physical level watermarking to counter such hardware threats. The proposed approach introduces novel key-driven partitioning based obfuscation and key-driven folding knob based obfuscation, along with other key-driven transformation based obfuscations. Additionally, the proposed approach presents novel multi-variable signature encoding based physical-level watermarking on key-based structurally obfuscated DSP circuits. The presented double line of defense incurs zero overhead as well yields high tamper tolerance during hardware watermarking. The proposed approach yields stronger strength of obfuscation, lower probability of co-incidence and larger key-space at low design cost against attacks.