Unified 0.75pJ/Bit TRNG and Attack Resilient 2F<sup>2</sup>/Bit PUF for Robust Hardware Security Solutions with 4-layer Stacking 3D NbO<sub>x</sub> Threshold Switching Array
Qingting Ding, Haijun Jiang, Jing Li, Chao Liu, Jie Yu, Pei Chen, Yulin Zhao, Yaxin Ding, Tiancheng Gong, Jianguo Yang, Qing Luo, Qi Liu, Hangbing Lv, Ming Liu
Abstract
For the first time, we demonstrated a unified approach to combine TRNG and PUF function in a 4-layer 3D threshold switching (TS) NbO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</inf> array. The dynamic TS variations and static leakage current mismatch is utilized for TRNG and PUF entropy. By digitizing the stochastic oscillator periods induced by thermal noise during TS process, the proposed TRNG presents the ultra-low energy consumption of 0.75 pJ/bit at 2.0 V, and excellent immunity against power noise attack (frequency range up to 400MHz, and amplitude range up to 600mV), which are verified by the NIST SP800-90B and NIST SP800-22 tests. Meanwhile, the proposed PUF has achieved: (i) high PUF key density per unit area (2F2/bit) for 4-layer stacking; (ii) low native bit error rate (1.35%), ideal un-biased normal distribution of inter-die (0.49971) and intra-die (0.00039) hamming distances (HDs); (iii) excellent resistance against machine learning attack. This work provided an excellent hardware solution for low-cost secure integrated systems.