Litcius/Paper detail

Half-select disturb-free single-ended 9-transistor SRAM cell with bit-interleaving scheme in TMDFET technology

Farzaneh Izadinasab, Morteza Gholipour

2021Microelectronics Journal19 citationsDOI

Topics & Concepts

InterleavingNoise marginTransistorReduction (mathematics)CMOSElectronic engineeringPower (physics)Computer scienceStatic random-access memoryDynamic demandNoise (video)Electrical engineeringVoltageEngineeringPhysicsMathematicsArtificial intelligenceQuantum mechanicsGeometryImage (mathematics)Advanced Memory and Neural ComputingSemiconductor materials and devicesFerroelectric and Negative Capacitance Devices