A 1024-Channel 268 nW/pixel 36x36 μm<sup>2</sup>/ch Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces
MoonHyung Jang, Wei-Han Yu, Changuk Lee, M.T. Hays, Pingyu Wang, Nick Vitale, Pulkit Tandon, Pumiao Yan, Pui‐In Mak, Youngcheol Chae, E. J. Chichilnisky, Boris Murmann, Dante G. Muratore
Abstract
This paper presents a neural recording IC featuring lossy compression during digitization, thus preventing data deluge and enabling a compact active digital pixel design. The wired-OR-based compression discards unwanted baseline samples while allowing the reconstruction of spike samples. The IC features a 32x32 MEA with $36 \mu m$ pixel pitch and consumes 268nW per pixel from a single 1V supply. It achieves $9.8 \mu V_{RMS}$ input-referred noise and 0.3-5kHz bandwidth, resulting in NEF/PEF of 3.7/14.1.
Topics & Concepts
PixelBandwidth (computing)DigitizationLossy compressionComputer scienceChannel (broadcasting)Data compressionComputer hardwareElectronic engineeringArtificial intelligenceEngineeringTelecommunicationsAdvanced Memory and Neural ComputingNeuroscience and Neural EngineeringNeural Networks and Applications