Tapeout of a RISC-V crypto chip with hardware trojans

Alexander Hepp, Georg Sigl

202127 citationsDOI

Abstract

This paper presents design and integration of four hardware Trojans (HTs) into a post-quantum-crypto-enhanced RISC-V micro-controller, which was taped-out in September 2020. We cover multiple HTs ranging from a simple denial-of-service HT to a side-channel HT transmitting arbitrary information to external observers. For each HT, we give estimations of the detectability by the microcontroller-integration team using design tools or by simulation. We conclude that some HTs are easily detected by design-tool warnings. Other powerful HTs, modifying software control flow, cause little disturbance, but require covert executable code modifications. With this work, we strengthen awareness for HT risks and present a realistic testing device for HT detection tools.

Topics & Concepts

Embedded systemExecutableComputer scienceMicrocontrollerCover (algebra)Controller (irrigation)Reduced instruction set computingComputer hardwareOperating systemInstruction setEngineeringAgronomyMechanical engineeringBiologyPhysical Unclonable Functions (PUFs) and Hardware SecurityIntegrated Circuits and Semiconductor Failure AnalysisAdvanced Malware Detection Techniques