Design and Implementation of Physical Unclonable Function in Field Programmable Gate Array
B A Vivek, A. Arulmurugan, S Maheswaran, S. Dhamodharan, A. S. Dharunash, N. Gowtham
Abstract
The increasing digitalization of data has necessitated the need for enhanced security to protect sensitive information. Random number generators play a critical role in cryptographic systems by providing the required randomness for their applications. This project aims to design and implement a physical unclonable function (PUF) based true random number generator in a field programmable gate array (FPGA). The proposed method employs the use of Ring Oscillator Physical Unclonable Function (ROPUF) response to generate random numbers. However, the current method has the drawback of outputting random numbers dependent on only two ring oscillators. To overcome this limitation, all ring oscillators are sampled using D flip-flops to obtain a signal of all ring oscillators at a constant time and then XORed, followed by post-processing using a Von Neumann architecture to enhance the randomness of the generated bits. The proposed method considers the delay produced by all ring oscillators, thereby increasing randomness.