Thermal and Electrical Study of Single-Event Burnout and Hardening in 600 V Lateral DMOSFETs With Optimized Trench Drain
Yibo Lei, Jian Fang, Qingchen Shi, Shangyang Li, Lijuan Shi, Xihu Xiong, Xiaorong Luo, Bo Zhang
Abstract
A single-event burnout (SEB)-hardened design based on a 600 V lateral double-diffused metal-oxide-silicon with an optimal trench drain (TD-LDMOS) is proposed in this article. By electro-thermal coupled simulations in a 2-D technology computer-aided design device simulator, the SEB triggering mechanisms are numerically studied. Simulation results show that regenerative feedback between the drain avalanche breakdown and the false opening of the source parasitic NPN leads to the secondary breakdown and thermal breakdown of the device. With the introduction of the trench drain (TD), the electric field at the drain can be reconstructed, and its peak value can be suppressed and shaped. Meanwhile, the path of the electron current is also changed, and the highest location of lattice temperature is transferred from the surface to the inside, further increasing the SEB triggering voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {SEB}}{)}$ </tex-math></inline-formula> . Under the condition that the linear energy transfer (LET) of 0.2 pC/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> , <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {SEB}}$ </tex-math></inline-formula> can be increased from 197 V of conventional LDMOS to 288 V of TD-LDMOS with no effect on the threshold voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {TH}}{)}$ </tex-math></inline-formula> and the ON-resistance ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{ \mathrm{\scriptscriptstyle ON}}{)}$ </tex-math></inline-formula> . TD-LDMOS also has a much larger safe operating area (SOA) ratio than the conventional one at different LET values and angles of incidence, which makes the 600 V TD-LDMOS used in aerospace and aviation electronic systems become possible.