A Highly Linear 10-Bit DAC of Data Driver IC Using Source Degeneration Load for Active Matrix Flat-Panel Displays
Jun-Seok Na, Seong‐Kwan Hong, Oh‐Kyong Kwon
Abstract
This brief proposes a highly linear digital-to-analog converter (DAC) of the data driver IC for active matrix flat-panel displays (AMFPDs). The proposed 10-bit two-stage DAC is realized with an upper 6-bit decoder and a lower 4-bit DAC-embedded amplifier. The decoder in the first stage selects two adjacent voltages from among the reference voltages of the R-string according to the upper 6-bit. The DAC-embedded amplifier in the second stage employs a source degeneration load to have the output current proportional to the input voltage, thus achieving the consistent transconductance of the input differential pairs, resulting in a high linearity. To verify the performance of the proposed DAC, a data driver IC with the proposed 10-bit DAC was fabricated using an 80 nm standard CMOS process with 8 V high-voltage devices. The measurement results show that the worst differential nonlinearity and integral nonlinearity are +0.26/-0.31 LSB and +0.57/-0.58 LSB, respectively. The measured worst inter-channel deviation of voltage outputs is 1.65 mV. Therefore, the proposed highly linear DAC is suitable for data driver ICs in high image quality AMFPD applications.