On Decoupling Capacitor Size in GaN-Based Power Converters
Logan Horowitz, Robert C. N. Pilawa-Podgurski
Abstract
High-performance hard-switched converters suffer from significant voltage overshoot and ringing upon switching transitions. This increases switch stress and electromagnetic interference, while also reducing reliability. Attempts to mitigate these drawbacks with increased gate resistance, or a slower switching device, yield reduced efficiency. Large bulk capacitors are typically required to meet voltage ripple constraints under load. As such, their package inductance is considerable and they may be placed far from the power path. A smaller decoupling capacitor is often placed near the switching devices in order to reduce overshoot. In this work, a circuit model is developed to describe converter operation during the switching transition, and a simple empirical equation for optimal decoupling capacitor sizing is proposed. The analyses are validated via experimental measurement of double pulse tests on a variety of hardware prototypes.