A 32x32 SPAD Pixel Array with Nanosecond Gating and Analog Readout

Abstract

CMOS Single Photon Avalanche Diode (SPAD) arrays are emerging as appealing solid-state detectors in imaging applications where high sensitivity and timing resolution are required. In this work, a 32x32-pixel array where SPAD digital output is processed in the analog domain in a 12-transistor pixel is presented. A 25um pixel pitch with a remarkable 20.8% fill factor was achieved thanks to a very compact pixel electronics, and gating pulse widths down to 1.1ns FWHM at 80MHz repetition rate were demonstrated.

Topics & Concepts