Preventive Measure of SAT Attack by Integrating Anti-SAT on Locked Circuit for Improving Hardware Security
R. Naveenkumar, N. M. Sivamangai, A. Napolean, A. Puviarasu, G. Saranya
Abstract
The use of logic locking to combat piracy is a viable option and counterfeiting of outsourced IC design by unreliable foundries. Even when a secure key is supplied a locked IC enable the proper functioning. However, a new assault known as the SAT attack threatens its security, as it can decrypt the appropriate key for the most logic locking methods in a short span of time, even if there are a lot of keys. SAT attacks degrade the security by breaking the formulae sequentially, rejecting wrong keys one by one until the circuit is unlocked. These issues are solved by The Anti-SAT block (ASB) is a technique for improving the protection of traditional logic locking approaches it in opposition to SAT attack. The objective of this paper is to overcome issues of piracy, counterfeiting, and SAT attacks. Develop the security in opposition to SAT attacks through the Anti-Sat circuit block with obfuscation technique. Proposed Anti -Sat based structural obfuscation for C17 benchmark with iterations. Experimental results confirm that the suggested XOR/XNOR logic locking anti-sat with structural obfuscation concept enhances the security with an iteration perspective. Moreover, the amount of SAT attack repetitions needed to expose a proper key in a circuit including an Anti-Sat Block is proportional to the key-size, computationally, the SAT attack is unachievable.