Row Hammer Reduction Using a Buried Insulator in a Buried Channel Array Transistor
Jin Hyo Park, Su Yeon Kim, Dong Yeong Kim, Geon Kim, Je Won Park, Sunyong Yoo, Youngwoo Lee, Myoung Jin Lee
Abstract
In this article, we propose an analysis of the usage of a partial isolation type buried channel array transistor (Pi-BCAT). Compared with other structures, the conventional BCAT exhibits improved characteristics in the row hammer effect (RHE) because of its shallow drain/body (D/B) junction. Nevertheless, it remains affected by the RHE and should be mitigated because it is directly related to the reliability of dynamic random access memory (DRAM) applications. The proposed device exhibits a 50% improvement in the RHE and reduces leakage current ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{{\mathrm {OFF}}}$ </tex-math></inline-formula> ) to one-third the level of conventional BCATs while also minimizing the ON -current ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{{\mathrm {ON}}}$ </tex-math></inline-formula> ) reduction. Moreover, to efficiently compare RHE, we compare <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta {V}_{\text {SN}}$ </tex-math></inline-formula> by RHE and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta {V}_{\text {SN}}$ </tex-math></inline-formula> based on the gate-induced drain leakage (GIDL) according to bias conditions and the device’s parameters. Finally, we optimize the parameter values of the buried insulator by considering electrical characteristics and the RHE.