Temperature Induced Analog Performance Modulation of High- Vertical Nanowire Tunnel FET
Anjana Bhardwaj, Amit Das, U. Sharma, Ashish Gupta, Swarnima Roy
Abstract
The paper provides a thorough analysis for the impact of temperature on the Analog and RF parameters of high- vertical nanowire tunnel FET (H -VNWTFET). Additionally, the suggested design’s RF/Analog behaviour against temperature was examined using the TCAD simulator. Transconductance (gm), cut-off frequency (fT), ION/IOFF, threshold voltage (Vt), subthreshold swing (SS), drain current characteristics (ID), and analog/RF parasitic capacitances (CGG, CGS, and CGD) are all impacted by temperature. The results reveal that vertical nanowire TFET exhibits weak temperature dependence when discussing the structural parameters, while the analog parameters are quite affected by temperature variation. The proposed device is examined with a temperature range from 200 to 450 K. The device is a great competitor for low-power switching and analogue applications because of its remarkable performance, which includes minimal SS of roughly 13.17 mV/decade, an increased ION/IOFF of about 5.54 × 10+10, and excellent dependability even under temperature fluctuations.