On the Challenges and Design Mitigations of Single Transistor Ferroelectric Content Addressable Memory
Haotian Xu, Jianyi Yang, Thomas Kämpfe, Cheng Zhuo, Kai Ni, Xunzhao Yin
Abstract
In this work, we identify the potential challenges of ambipolar ferroelectric field effect transistor (FeFET) in building a single transistor CAM array to perform parallel hamming distance (HD) computations. The asymmetry in the two current branches of an ambipolar FeFET, such as different subthreshold swing (SS) and ON state current <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{\mathrm{ ON}}$ </tex-math></inline-formula> , on the CAM functionality are analyzed, showing that both asymmetry sources can significantly degrade the HD functionality. Two alternative designs, i.e., one is a modified search strategy and the other one is a series current limiter, that can address the asymmetry issue are proposed and validated, thus shedding light on continuous optimization for ambipolar FeFET based designs.