Ultralow Power Consumption and Large Dynamic Range Synaptic Transistor Based on α-In<sub>2</sub>Se<sub>3</sub> Nanosheets
Bin Tang, Xuan Li, Jianhui Liao, Qing Chen
Abstract
The conventional von-Neumann architecture suffers from large power consumption, high circuitry complexity, and difficulty in miniaturization due to the physical separation of the processing and memory units. To overcome this bottleneck, neuromorphic computing has been proposed, which can work with ultralow power consumption and without any need for a bus for transferring data. Synaptic transistors are a fundamental part of the neuromorphic system, which can integrate signal processing and storage. However, a relatively poor performance of the reported synaptic devices, such as the nonlinear weight update, small dynamic range, and higher energy consumption than that of biological synapses (∼10 fJ), hinders the development of energy-efficient neuromorphic systems. Here, we demonstrate the excellent performance of a top-gated synaptic transistor based on α-In2Se3 nanosheets with a thickness of less than 10 nm. Their outstanding performances include an ultralow power consumption of 3.36 fJ per spike response, a large dynamic range of 158, and near-zero nonlinearity. In addition, a simulated neural network based on our synaptic transistor shows excellent pattern recognition accuracy. After 120 online learning cycles, the pattern recognition accuracy reaches 92.1%, which is close to the ideal accuracy of 93.2%. Such a high-performance synaptic transistor implies the great potential of two-dimensional ferroelectric semiconductors in future neuromorphic computing systems.