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Design and Evaluation of a Power Hardware-in-the-Loop Machine Emulator

John Noon, He Song, Bo Wen, Igor Cvetkovic, Srdjan Srdic, Gernot Pammer, Rolando Burgos

202017 citationsDOI

Abstract

This paper details the design and implementation of a power hardware-in-the-loop (PHIL) electric machine emulator for the purpose of induction motor drive testing. The biggest advantage of PHIL over traditional motor drive testbenches is its flexibility to serve as a test bench for a variety of electric machines without any hardware changes, thereby reducing the testbench hardware overhead. The topology and the capabilities of EGSTON Power Electronics’ CSU PHIL platform to emulate the electrical machines are presented. Additionally, the practical implementation of the PHIL testbench is discussed, including the interface inductor and the measurement setup. The tradeoffs between current-source and voltage-source based emulation of electric machines are presented. This work considers current-source based emulation because the current emulation fidelity is independent of the interface inductor value which makes this approach very flexible. Finally, the emulation results are presented and compared experimentally with a physical machine.

Topics & Concepts

EmulationHardware emulationComputer scienceInduction motorEmbedded systemInterface (matter)Overhead (engineering)VoltageElectrical engineeringEngineeringComputer hardwareElectronic engineeringField-programmable gate arrayMaximum bubble pressure methodBubbleEconomicsParallel computingEconomic growthReal-time simulation and control systemsSilicon Carbide Semiconductor TechnologiesElectrostatic Discharge in Electronics
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