TeraPool-SDR: An 1.89TOPS 1024 RV-Cores 4MiB Shared-L1 Cluster for Next-Generation Open-Source Software-Defined Radios
Yichao Zhang, Marco Bertuletti, Samuel Riedel, Matheus Cavalcante, Alessandro Vanelli‐Coralli, Luca Benini
Abstract
Radio Access Networks (RAN) workloads are rapidly scaling up in data processing intensity and throughput as the 5G (and beyond) standards grow in number of antennas and sub-carriers. Offering flexible Processing Elements (PEs), efficient memory access, and a productive parallel programming model, many-core clusters are a well-matched architecture for next-generation software-defined RANs, but staggering performance requirements demand a high number of PEs coupled with extreme Power, Performance and Area (PPA) efficiency. We present the architecture, design, and full physical implementation of Terapool-SDR, a cluster for Software Defined Radio (SDR) with 1024 latency-tolerant, compact RV32 PEs, sharing a global view of a 4 MiB, 4096-banked, L1 memory. We report various feasible configurations of TeraPool-SDR featuring an ultra-high bandwidth PE-to-L1-memory interconnect, clocked at 730 MHz, 880 MHz, and 924 MHz (TT/0.80 V/<Formula format="inline"><TexMath><?TeX $25 \,\mathrm{ \mathrm{^{\circ }\mathrm{\mathrm{C}}}}$?></TexMath><AltText>Math 1</AltText><File name="glsvlsi24-40-inline1" type="svg"/></Formula>) in 12 nm FinFET technology. The TeraPool-SDR cluster achieves high energy efficiency on all SDR key kernels for 5G RANs: Fast Fourier Transform (93 GOPSW− 1), Matrix-Multiplication (125 GOPSW− 1), Channel Estimation (96 GOPSW− 1), and Linear System Inversion (61 GOPSW− 1). For all the kernels, it consumes less than 10 W, in compliance with industry standards.