Development of a novel fault-tolerant reduced device count T-type multilevel inverter topology
Dhananjay Kumar, Rajesh Nema, Sushma Gupta
Topics & Concepts
Topology (electrical circuits)Network topologyTotal harmonic distortionFault toleranceInverterH bridgeRobustness (evolution)CapacitorMATLABComputer scienceFault (geology)VoltageElectronic engineeringEngineeringElectrical engineeringDistributed computingChemistryOperating systemSeismologyBiochemistryGeneGeologyMultilevel Inverters and ConvertersSilicon Carbide Semiconductor TechnologiesMicrogrid Control and Optimization