Litcius/Paper detail

Integrated Stateflow-based simulation modelling and testability evaluation for electronic built-in-test (BIT) systems

Junyou Shi, Qingjie He, Zili Wang

2020Reliability Engineering & System Safety27 citationsDOI

Topics & Concepts

TestabilityStateflowReliability engineeringComputer scienceFault coverageFault injectionFault (geology)False alarmEmbedded systemComputer engineeringElectronic engineeringEngineeringSoftwareArtificial intelligenceProgramming languageGeologySeismologyMATLABElectronic circuitElectrical engineeringVLSI and Analog Circuit TestingEngineering and Test SystemsRadiation Effects in Electronics