The enhancement of security measures in advanced encryption standard using double precision floating point multiplication model
B. Srikanth, Mahendra Kumar, J. V. R. Ravindra, Kakarla Hari Kishore
Abstract
Abstract The multiplication strategy is a trending technology in chip programming model; also, it is used in different applications for different purpose. This research aims to develop the floating point double precision Furer Toom cook fast integer multiplication model in the Advanced Encryption Standard process round to enhance the security. In addition, the cryptography algorithms have been broken due to some harmful attack. So the main focus of this present research is to enhance the security measures in communication channel. Moreover, the proposed model is implemented in Xilinx and simulated in cadence 90 nm technology. By comparing the proposed work with recent existing models, the proposed research has reduced the power consumption as 5331.73 nW, thus 89% of power is reduced by the proposed Furer Toom cook multiplication model. The reduction of power enhanced the performance of multiplication algorithm so, while it is utilized in any application, it could not cause any loss of process. In addition, the developed strategy is process within 563 MHz frequency and utilized 11 250 cells. Thus, the proposed model provides better security for all wireless appliances.