Sixty Degree PWM Controlled 7-Level Inverter Utilizing Binary Input
Vijayakumar Madhaiyan, R. Murugesan, Gobimohan Sivasubramanian, Vijayakumar Muniyan, V. Arun, S. Prabhu
Abstract
This article introduces a sixty-degree reference PWM methodology designed to enhance the quality of the output voltage in a binary source seven-level inverter (BSSLI) configuration. The central objective of this proposed PWM technique is to elevate the output voltage’s overall quality. This is achieved through the application of several PWM strategies. To assess the efficacy of these approaches, a range of modulation indices is considered, and various performance metrics, are calculated for various modulation indices. The study employs both MATLAB-SIMULINK simulations and real-time FPGA implementation for comprehensive evaluation. The outcomes reveal that the restructured sinusoidal PWM technique, specifically the UVF-PD approach, significantly reduces THD, while the UCO-PWM method yields a heightened fundamental RMS output voltage.