Litcius/Paper detail

Design and Optimization of Dual Material Gate Junctionless FinFET Using Dimensional Effect, Gate Oxide and Workfunction Engineering at 7 nm Technology Node

Rambabu Kusuma, V. K. Hanumantha Rao Talari

2022Silicon16 citationsDOI

Topics & Concepts

Materials scienceGate oxideOxideOptoelectronicsHigh-κ dielectricIonEquivalent oxide thicknessGate dielectricNanoscopic scaleDrain-induced barrier loweringDielectricDopingNanotechnologyElectrical engineeringTransistorVoltagePhysicsMetallurgyEngineeringQuantum mechanicsSemiconductor materials and devicesAdvancements in Semiconductor Devices and Circuit DesignIntegrated Circuits and Semiconductor Failure Analysis
Design and Optimization of Dual Material Gate Junctionless FinFET Using Dimensional Effect, Gate Oxide and Workfunction Engineering at 7 nm Technology Node | Litcius