Silicon lifecycle management (SLM) with in-chip monitoring
Rajesh Kashyap
Abstract
Increasing chip and system complexity, coupled with growing performance and reliability requirements, are driving the need for ongoing post-silicon analysis, maintenance and optimization. In-chip monitor and sensor data provide visibility into critical performance, reliability and security issues for the entirety of a chip's lifespan. Silicon lifecycle management closes the silicon loop through the analysis of the data from monitors and sensors and enables new levels of insights for both SoC teams and their customers and provide the ability to optimize operational activities at each stage of the device and system lifecycles.
Topics & Concepts
Reliability (semiconductor)VisibilityChipComputer scienceSilicon chipReliability engineeringSystem on a chipEmbedded systemSiliconSystems engineeringEngineeringMaterials scienceTelecommunicationsOpticsMetallurgyPhysicsQuantum mechanicsPower (physics)VLSI and Analog Circuit TestingIntegrated Circuits and Semiconductor Failure AnalysisSilicon and Solar Cell Technologies