Method to Interface Grid-Forming Inverters into Power Hardware in the Loop Setups
Javier Hernández-Alvídrez, Nicholas S. Gurule, Matthew J. Reno, Jack Flicker, Adam Summers, Abraham Ellis
Abstract
During the last decade, utility companies around the world have experienced a significant increase in the occurrences of either planned or unplanned blackouts, and microgrids have emerged as a viable solution to improve grid resiliency and robustness. Recently, power converters with grid-forming capabilities have attracted interest from researchers and utilities as keystone devices enabling modern microgrid architectures. Therefore, proper and thorough testing of Grid-Forming Inverters (GFMIs) is crucial to understand their dynamics and limitations before they are deployed. The use of closed-loop real-time Power Hardware-in-the-Loop (PHIL) simulations will facilitate the testing of GFMIs using a digital twin of the power system under various contingency scenarios within a controlled environment. So far, lower to medium scale commercially available GFMIs are difficult to interface into PHIL simulations because of their lack of a synchronization mechanism that allows a smooth and stable interconnection with a voltage source such as a power amplifier. Under this scenario, the use of the well-known Ideal Transformer Method to create a PHIL setup can lead to catastrophic damages of the GFMI. This paper addresses a simple but novel method to interface commercially available GFMIs into a PHIL testbed. Experimental results showed that the proposed method is stable and accurate under standalone operation with abrupt (step) load-changing dynamics, followed by the corresponding steady state behavior. Such results were validated against the dynamics of the GFMI connected to a linear load bank.