High Current, High Power-Density Intermediate Bus Converters for Vertical Power Delivery to Next-Generation Processors
Pranav Raj Prakash, Ahmed Nabih, Yan Liang, Sudhir S. Kudva, Mostafa Mosa, C. Thomas Gray, Qiang Li
Abstract
Advancements in artificial intelligence and machine learning are driving the development of a new generation of extremely powerful graphics processing units (GPUs) with exponentially increasing transistor counts, requiring larger die sizes and more power. Today, employing the conventional two-stage lateral power delivery with a 12 V intermediate bus voltage (IBV) requires most of the real estate in the GPU cards to be occupied by power delivery circuits. However, this is impractical for the next-generation GPUs with larger sizes and higher power consumptions, resulting in the interest to transition to vertical power delivery, where a lower IBV is used to reduce the size of the voltage regulators and move them vertically underneath the GPU. However, this increases the required step-down ratio for the first-stage intermediate bus converter (IBC), making it challenging to maintain high efficiency while constrained to a limited footprint. This paper proposes a high-density transformer unit-cell for the 1st-stage LLC-based IBC, one or more of which can be connected to achieve different IBVs. To demonstrate an implementation of the transformer, an 840 W 48 V/1.8 V LLC converter is designed with an array of 14 transformers built into seven unit cells, distributed along the edge of the GPU package to minimize the power distribution network (PDN) losses. The converter module can achieve up to 95.5% efficiency while showcasing a power density of 2200 W/in<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup>.