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Modeling, Simulation and Performance Analysis of Drain Current for Below 10 nm Channel Length Based Tri-Gate FinFET

Suparna Panchanan, Reshmi Maity, Srimanta Baishya, N. P. Maity

2022Silicon12 citationsDOI

Topics & Concepts

Materials scienceTransconductanceDrain-induced barrier loweringChannel length modulationOptoelectronicsConductanceSubthreshold swingTechnology CADField-effect transistorEquivalent series resistanceTransistorCurrent (fluid)Gate oxideGate dielectricSubthreshold slopeElectrical engineeringCondensed matter physicsVoltageEngineeringPhysicsEngineering drawingCADAdvancements in Semiconductor Devices and Circuit DesignIntegrated Circuits and Semiconductor Failure AnalysisElectrostatic Discharge in Electronics
Modeling, Simulation and Performance Analysis of Drain Current for Below 10 nm Channel Length Based Tri-Gate FinFET | Litcius