Design Space Optimization for Eradication of NDR Effect in Dielectric/Ferroelectric-Stacked Negative Capacitance Multigate FETs at Sub-3 nm Technology for Digital/ Analog/RF Applications
Sresta Valasa, Venkata Ramakrishna Kotha, Shubham Tayal, Narendar Vadthiya
Abstract
In this study, for the first time we benchmark the dc/analog/RF performance of dielectric/ferroelectric (FE)-stacked negative capacitance (NC)-based multigate devices, including FinFETs, nanowire (NW)FETs, and nanosheet (NS)FETs, at the sub-3 nm technology node’s ultimate scaling limit involving a fully calibrated 3-D TCAD simulation. Exploring a design space to eliminate negative differential resistance (NDR) and optimize performance, we varied parameters such as gate length (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${L}_{\text {g}}\text {)}$ </tex-math></inline-formula>, fin thickness (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${T}_{\text {fin}}\text {)}$ </tex-math></inline-formula>, fin height (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${H}_{\text {fin}}\text {)}$ </tex-math></inline-formula>, NW diameter (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${D}_{\text {NW}}\text {)}$ </tex-math></inline-formula>, NS width (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${W}_{\text {NS}}\text {)}$ </tex-math></inline-formula>, and NS thickness (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${T}_{\text {NS}}\text {)}$ </tex-math></inline-formula>. The analysis shows that the NC-NSFET outperforms NC-FinFET, exhibiting an improved SS, enhanced intrinsic gain (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${A}_{\text {V}}\text {)}$ </tex-math></inline-formula> of ~15% and a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3\times $ </tex-math></inline-formula> improvement in cut-off frequency (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${f}_{\text {T}}\text {)}$ </tex-math></inline-formula>. Notably, NDR effects were observed for <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${L}_{\text {g}} \lt 15$ </tex-math></inline-formula> nm in all devices and for NC-FinFET, downsizing <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${T}_{\text {fin}}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${H}_{\text {fin}} \lt 5$ </tex-math></inline-formula> nm and <30 nm, respectively; for NC-NSFET, scaling <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${T}_{\text {NS}}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${W}_{\text {NS}} \lt 5$ </tex-math></inline-formula> nm and <18 nm, respectively. Additionally, NC-NSFET demonstrated a ~50% reduction in negative drain-induced barrier lowering (DIBL) when compared to NC-FinFET. At lower <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${L}_{\text {g}}$ </tex-math></inline-formula>, the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${f}_{\text {T}}$ </tex-math></inline-formula> is noticed to be improved by an amount of ~6.6%, ~17.4%, and ~23.7% for NC-FinFET, NC-NWFET, and NC-NSFET, respectively, with better performance noticed for NC-NSFET. By downscaling the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${T}_{\text {fin}}$ </tex-math></inline-formula> to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sim 3.6\times $ </tex-math></inline-formula>, the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${A}_{\text {V}}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${f}_{\text {T}}$ </tex-math></inline-formula> is found to be improved by ~42.6% and ~21.5%, respectively. However, scaling the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${H}_{\text {fin}}$ </tex-math></inline-formula> resulted in better improvement in fT by ~48.47%. By downscaling the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${T}_{\text {NS}}$ </tex-math></inline-formula>, the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${A}_{\text {V}}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${f}_{\text {T}}$ </tex-math></inline-formula> are improved by ~28.13% and ~46.19% while scaling the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${W}_{\text {NS}}$ </tex-math></inline-formula>, the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${f}_{\text {T}}$ </tex-math></inline-formula> is improved by ~45.96%. Overall, this research establishes the NC-NSFET as a frontrunner proving itself as the optimal choice for analog/RF applications in the realm of nanoscale semiconductor technology.