A Low-Power Low-Noise W-band LNA in 90-nm CMOS Process With Source Degeneration Technique
Pin-Hsuan Huang, Chia-Sung Chiu, Guo‐Wei Huang, Kun‐Ming Chen, Lin-Kun Wu
Abstract
This letter presents the design of a <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">W</i> -band low-noise amplifier (LNA) using a four-stage common-source (CS) architecture fabricated in a 90-nm CMOS process. The LNA employs source degeneration with a transmission line to achieve a minimum noise figure (NF) of 5.0 dB and flat gain of 16.9 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\pm$</tex-math> </inline-formula> 1.5 dB from 76.5 to 87.5 GHz for a 3-dB bandwidth of 11 GHz. The circuit consumes only 14 mW of dc power when biased at a 1 V power supply.