Cross Connected Compact Switched-Capacitor Multilevel Inverter (C<sup>3</sup>-SCMLI) Topology With Reduced Switch Count
Jagabar Sathik Mohamed Ali, N. Sandeep, Dhafer Almakhles, Frede Blaabjerg
Abstract
In this brief, a new cross-connected compact switched capacitor (C <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> SC) cell is introduced for multilevel inverter applications. The proposed CCS cell uses four switches and two diodes for interconnecting the input dc source and floating capacitors (FCs). A nine-level inverter is derived with the proposed C <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> SC cell requiring only ten switches and two FCs. The proposed C <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> SC cell-based MLI is self-balancing and has a voltage gain of two. All the switches of the proposed topology have a maximum blocking voltage within the input dc voltage (v <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">in</sub> ) value. The operating principle is detailed, and a simple logic gate based gate pulse generation scheme is presented. Detailed simulations and experimental results obtained from an 850 W prototype with several test cases are presented to validate the operation of the proposed topology. Finally, a detailed comparative assessment is performed with other recent SCMLIs to demonstrate the merits and superiority of the proposed topology.