An 18.6-μm-Pitch Gate Driver Using a-IGZO TFTs for Ultrahigh-Definition AR/VR Displays
Yuanfeng Chen, Hyunho Kim, Jiseob Lee, Suhui Lee, Youngbin Do, Munsu Choi, Jin Jang
Abstract
We report the design and fabrication of a high-speed and ultranarrow pitch gate driver with amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO TFTs). At a supply voltage of 10 V, the gate driver operates with a pulsewidth of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${1}~\boldsymbol \mu \text{s}$ </tex-math></inline-formula> and corresponds to an operating frequency of 500 kHz, which is compatible with an 8k4k resolution display operated at 240 Hz. It is also ultrasmall in physical size with merely <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$18.6~\boldsymbol \mu \text{m}$ </tex-math></inline-formula> in width (pitch) and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$530~\boldsymbol \mu \text{m}$ </tex-math></inline-formula> in length that makes it suitable for small size, ultrahigh definition (UHD), and narrow bezel displays with pixel density up to 2700 pixel per inch (ppi) for augmented reality and virtual reality (AR/VR) applications. The fabricated gate driver exhibits the rising time of ~360 ns and falling time of ~430 ns at 10 V with no ripples and degradation after the 480th stage. This effort demonstrates the potential of dual-gate a-IGZO TFTs for high-speed high-density display circuit integration.