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Highly Scaled GaN Complementary Technology on a Silicon Substrate

Qingyun Xie, Mengyang Yuan, John Niroula, Bejoy Sikder, James A. Greer, Nitul S. Rajput, Nadim Chowdhury, Tomás Palacios

2023IEEE Transactions on Electron Devices34 citationsDOIOpen Access PDF

Abstract

This article reports on the scaling of GaN complementary technology (CT) on a silicon substrate to push its performance limits for circuit-level applications. The highly scaled self-aligned (SA) p-channel FinFET (a fin width of 20 nm) achieved an <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{D,\text {max}}$ </tex-math></inline-formula> of −300 mA/mm and an <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{ \mathrm{ ON}}$ </tex-math></inline-formula> of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$27 \Omega \cdot $ </tex-math></inline-formula> mm, a record for metal organic chemical vapor deposition (MOCVD)-grown III-nitride p-FETs. A systematic study on impact of fin width scaling and recess depth in these transistors was conducted. A new SA scaled n-channel p-GaN-gate FET (n-FET) process, compatible with the p-FinFET, demonstrated enhancement-mode (E-mode) n-FETs ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${L}_{G} = {200}$ </tex-math></inline-formula> nm, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{D,\text {max}} = {525}$ </tex-math></inline-formula> mA/mm, and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{ \mathrm{ ON}}={2}.{9}\,\,\Omega \cdot $ </tex-math></inline-formula> mm) on the same epitaxial platform. The p-FETs and n-FETs feature competitive performance in their respective categories and, when taken together, offer a leading solution for GaN CT on a silicon substrate.

Topics & Concepts

Substrate (aquarium)NotationScalingMathematicsPhysicsMaterials scienceArithmeticGeometryOceanographyGeologyGaN-based semiconductor devices and materialsSemiconductor materials and devicesSemiconductor Quantum Structures and Devices
Highly Scaled GaN Complementary Technology on a Silicon Substrate | Litcius