Semiconductor Wafer Surface: Automatic Defect Classification with Deep CNN
Charissa Phua, Lau Bee Theng
Abstract
The rise of artificial intelligence (AI) technologies and the increasing demand for defect-free wafers encourage semiconductor manufacturers to pursue automatic defect classification (ADC). The current ADC system classifies wafer surface defects using optical and Scanning Electron Microscope (SEM) images however manual classification is still a major part of the process and it is not only labour-intensive and slow but also highly prone to human error. This paper explores an ADC system based on deep learning that automatically classifies wafer surface defects, particularly from the metal layers, which brings consistency and speed, allowing for better determination of wafer lifecycle as well as defect root cause analysis in yield management. The proposed method adopts a deep convolutional neural network (CNN) architecture for defect classification using SEM images which can sub-classify defects into respective sizing groups whereby defect size serves as an important indicator of the origin of machine failure. This research observes that the proposed ADC method achieves industrially pragmatic defect classification performance based on experimentations with real semiconductor datasets. This paper investigates the promise of transfer learning for reducing computational cost and improving testing accuracy.