A Low-Cost Vertically Integrated Antenna Array at 60 GHz With 85% Efficiency
Jiantong Li, Carmen Matos, Nima Ghalichechian
Abstract
Although the 60 GHz band meets the higher data rate demands for various wireless applications, large path losses and small size of 5 mm free-space wavelength makes the design, fabrication, packaging, and measurement of 60 GHz antenna arrays challenging. In this letter, we present a low-cost and high-efficiency patch antenna array fabricated using a printed circuit board (PCB) process. As the mini-connector size is larger than unit-cell at 60 GHz, it poses challenges for separate feeding for each array element. This optimized configuration not only addresses the mini-connector assembly shortcoming for off-chip antenna measurements in a laboratory environment but also permits future direct flip-chip integration on a transceiver. Embedded thin-film resistors are first used to fabricate 50 Ω termination and calibration elements on the same board, thus removing associated lossy and bulky external loads and calibration kit. Next, a highly precise robotic antenna measurement system is used to complete the challenging task of measuring far-field pattern at 60 GHz. The proposed 5×5 antenna array is matched at 60 GHz with the -10 dB bandwidth of 3.6 GHz (6%). The peak realized gain of the 5×5 array is 18.5 dBi, and the measured boresight efficiency is 85% at 60 GHz. Furthermore, the simulated maximum scanning volume is ±40° in the E-plane and ±45° in the H-plane. Therefore, the proposed 60 GHz antenna array maintains a low-cost, high-efficiency moderate scanning range with a potential for easy on-chip integration for future communication and sensing applications.