Investigation of Channel Parasitic Effect of CMOS Transistor for High Responsivity 2.58 THz Detector Array With Patch Antennas in Chip
Xin Zhang, Haipeng Fu, Kaixue Ma, Ningning Yan, Yaxuan Liu, Yipeng Mu
Abstract
This article is mainly to investigate the responsivity ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R<sub>v</sub></i> ) and noise equivalent power (NEP) performance of a 2.58 THz complementary metal-oxide-semiconductor (CMOS) detector under transistor parasitic capacitance effect between the gate-source and the gate-drain with different gate-source distances. The capacitance effect of the transistor was incorporated into existing response models to explore the enhanced response. A 4×8 terahertz (THz) detector array is designed and fabricated using 55-nm CMOS technology based on the asymmetric distance between the gate-source and gate-drain. Each detector comprised a high-efficiency on-chip single-ended patch antenna and a source-driven NMOS field-effect transistor. At 195-Hz modulation frequency, the enhanced <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R<sub>v</sub></i> of the designed THz imaging chip measured using lock-in techniques achieved the best <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R<sub>v</sub></i> of 573.5 V/W, and the minimum NEP of the detector unit was 95.9 pW/Hz <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1/2</sup> for the 2.58 THz at room temperature. Mechanical scanning transmission imaging of the leaf was carried out for verification with good quality.