7.2: A 2.2pJ/b 212.5Gb/s PAM-4 Transceiver with >46dB Reach in 5nm FinFET
A. Mostafa, Amr Ali Hassan, Anna Hsu, Ankit Kumar Singh, Chien‐Hung Wu, C.-R. Yang, D. Prabakaran, D. Storaska, D. Zhou, D. Visani, E. Hsiao, F. Chu, Fouzia Khan, F. Lu, Guangxu Cui, Gang Wang, J. Natonio, Junbo Deng, Jie Ding, Jun Guo, J. Gu, J. Zang, L. Jiang, Kuan-Yu Lu, M. Hasan, M. Kelly, Mostafa Haghi Kashani, Manisha Gambhir, M. R. Patoju, M. Singh, M. Shannon, Ming-Jen Yang, P. Liu, I P. Ramakrishna, Ruimin Chen, Roger Ho, Sudhir Shahi, S. Sivakumar, S. Xu, Xiaochen Yang, X. Han, Yu-Chuan Su, Z. Adal, Z. Guo, Zhe Li, Z. Yu, Zaolin Yan, H. Wang, K. C. Chang
Abstract
Given the explosive demand for bandwidth to satisfy new AI requirements, 100G/lane connectivity is transitioning to 200G/lane [1]–[6] to enable 1.6Tb/s Ethernet. Enabling robust operation at this rate necessitates resolution of challenges such as component bandwidth and signal integrity improvements in cables, connectors, and packages. Achieving the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$200\mathrm{G}/\text{lane}$</tex> objective requires power- and area-efficient approaches. The critical component to enable this connectivity is the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$224\text{Gb}/\mathrm{s}$</tex> transceiver. This work presents a long-reach low-power <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$224\text{Gb}/\mathrm{s}$</tex> PAM-4 SerDes transceiver capable of compensating for more than <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$46\text{dB}$</tex> of loss at 212 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$5\text{Gb}/\mathrm{s}$</tex> with an optimized analog power of 2. <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$2\text{pJ}/\mathrm{b}$</tex>, implemented in <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$5\text{nm}$</tex> FinFET process technology.