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A Pure 2H‐MoS<sub>2</sub> Nanosheet‐Based Memristor with Low Power Consumption and Linear Multilevel Storage for Artificial Synapse Emulator

Kaiyang Wang, Liteng Li, Rujie Zhao, Jianhui Zhao, Zhenyu Zhou, Jingjuan Wang, Hong Wang, Baokun Tang, Chao Lü, Jianzhong Lou, Jingsheng Chen, Xiaobing Yan

2020Advanced Electronic Materials105 citationsDOI

Abstract

Abstract Two‐dimensional (2D) transition metal dichalcogenide has attracted significant attention recently due to its unique electrical and optical properties. However, MoS 2 nanosheets fabricated by traditional methods exhibit poor electrical performance due to the existence of the 1T metal phase. A solution‐processable pure 2H semiconductor phase MoS 2 nanosheet for use as the functional layer of high‐performance memristors is presented. The resulting memristor based on a Ag/MoS 2 /Pt structure exhibits excellent resistive switching properties including high endurance and multilevel retention. Moreover, the power consumption and programming current of the SET operation can be as low as 7.35 nW and 100 nA, respectively. Interestingly, it is demonstrated that the resistance of the Ag/MoS 2 /Pt device can be bidirectionally modulated over a wide range (pulse number &gt;500) with an approximately linear trend. Furthermore, the accuracy of pattern recognition with handwritten data can reach 90.37%. This work provides a simple and practical method for the realization of fabrication of pure 2H‐MoS 2 and application in biological neural computing systems.

Topics & Concepts

NanosheetMemristorMaterials scienceNeuromorphic engineeringRealization (probability)OptoelectronicsNanotechnologyPower consumptionFabricationArtificial neural networkElectronic engineeringPower (physics)Computer scienceArtificial intelligenceStatisticsPathologyPhysicsAlternative medicineMathematicsEngineeringMedicineQuantum mechanicsAdvanced Memory and Neural Computing2D Materials and ApplicationsPhotoreceptor and optogenetics research
A Pure 2H‐MoS<sub>2</sub> Nanosheet‐Based Memristor with Low Power Consumption and Linear Multilevel Storage for Artificial Synapse Emulator | Litcius