First Demonstration of Novel Vertical Gate-All-Around Field-Effect-Transistors Featured by Self-Aligned and Replaced High-κ Metal Gates
Chen Li, Huilong Zhu, Yongkui Zhang, Qi Wang, Xiaogen Yin, Junjie Li, Guilei Wang, Zhenzhen Kong, Xuezheng Ai, Lu Xie, Yongbo Liu, Yangyang Li, Weixing Huang, Zijin Yan, Zhenfang Xiao, Henry H. Radamson, Junfeng Li, Wenwu Wang
Abstract
A novel n-type nanowire/nanosheet (NW/NS) vertical sandwich gate-all-around field-effect-transistor (nVSAFET) with self-aligned and replaced high-κ metal gates (HKMGs) is presented for the first time, aiming at a 3 nm technology node and beyond. The nVSAFETs were fabricated by an integration flow of Si/SiGe epitaxy, quasi-atomic layer etching (qALE) of SiGe selective to Si, formation of SiGe/Si core/shell NS/NW structure, building of nitride dummy gate, and replacement of the dummy gate. This fabrication method is complementary metal oxide semiconductor (CMOS)-compatible, simple, and reproducible, and NWs with a diameter of 17 nm and NSs with a thickness of 20 nm were obtained. Excellent control of short-channel-effects was presented. The device performance was also investigated and discussed. The proposed integration scheme has great potential for applications in chip manufacturing, especially with vertical channel devices.