Gate‐Defined Quantum Confinement in CVD 2D WS<sub>2</sub>
Chit Siong Lau, Jing Yee Chee, Liemao Cao, Zi‐En Ooi, Shi Wun Tong, Michel Bosman, Fabio Bussolotti, Tianqi Deng, Gang Wu, Shuo‐Wang Yang, Tong Wang, Siew Lang Teo, Calvin Pei Yu Wong, Jian Chai, Li Chen, Zhong Ming Zhang, Kah‐Wee Ang, Yee Sin Ang, Kuan Eng Johnson Goh
Abstract
Abstract Temperature‐dependent transport measurements are performed on the same set of chemical vapor deposition (CVD)‐grown WS 2 single‐ and bilayer devices before and after atomic layer deposition (ALD) of HfO 2 . This isolates the influence of HfO 2 deposition on low‐temperature carrier transport and shows that carrier mobility is not charge impurity limited as commonly thought, but due to another important but commonly overlooked factor: interface roughness. This finding is corroborated by circular dichroic photoluminescence spectroscopy, X‐ray photoemission spectroscopy, cross‐sectional scanning transmission electron microscopy, carrier‐transport modeling, and density functional modeling. Finally, electrostatic gate‐defined quantum confinement is demonstrated using a scalable approach of large‐area CVD‐grown bilayer WS 2 and ALD‐grown HfO 2 . The high dielectric constant and low leakage current enabled by HfO 2 allows an estimated quantum dot size as small as 58 nm. The ability to lithographically define increasingly smaller devices is especially important for transition metal dichalcogenides due to their large effective masses, and should pave the way toward their use in quantum information processing applications.