Improvement of Memory Window of Silicon Channel Hf₀.₅Zr₀.₅O₂ FeFET by Inserting Al₂O₃/HfO₂/Al₂O₃ Top Interlayer
Runhao Han, Tao Hu, Jia Yang, Mingkai Bai, Yajing Ding, Xianzhou Shao, Saifei Dai, Xiaoqing Sun, Junshuai Chai, Hao Xu, Kai Han, Xiaolei Wang, Wenwu Wang, Tianchun Ye
Abstract
In this work, we propose a gate structure to enhance the memory window (MW) of Si-channel Hf0.5Zr0.5O2 FeFETs. We achieve an MW of 10.04 V by inserting an Al2O3/HfO2/Al2O3 (AHA) top dielectric interlayer between the ferroelectric Hf0.5Zr0.5O2 layer and the metal gate, where the gate-stack thickness is 14.8 nm. The physical origin is that the Al2O3/HfO2, HfO2/Al2O3, and Al2O3/Hf0.5Zr0.5O2 interfaces can trap charges from the metal gate, contributing to the MW enhancement. This AHA top dielectric multilayer effectively suppresses charge loss compared with a single Al2O3 top dielectric interlayer. Moreover, the de-trapping of charges injected from the metal gate is the primary factor for the degradation of the MW in this structure. Our work provides a guide for improving the MW of FeFET.