Point Multiplication Accelerator for Arbitrary Montgomery Curves
Khalid Javeed, David Gregg
Abstract
This letter presents a novel and efficient hardware architecture to accelerate the computation of point multiplication (PM) primitive over arbitrary Montgomery curves. It is based on a new novel double field multiplier (DFM) that computes two field multiplications simultaneously. The DFM uses the interleaved multiplication technique, and it shortens the critical path of the circuit by computing two results at once. It is generic to work for any prime structure and curve parameters over the Montgomery curves. At the system level, a fast scheduling methodology is also presented to execute the field-level operations with the Montgomery ladder (ML) approach. Our ML and DFM designs perform the same operations regardless of the input values, which provides resistance to timing and simple power analysis side-channel attacks. It is synthesized and implemented over different FPGA platforms. The implementation results confirm that it outperforms the state-of-the-art in terms of area-time product and throughput/slice. To the best of the authors’ knowledge, it is the first fully LUT-based architecture for the arbitrary Montgomery curves.