CMOS-MEMS Accelerometer With Stepped Suspended Gate FET Array: Design & Analysis
Pramod Martha, Naveen Kadayinti, V. Seena
Abstract
This article presents a novel stepped suspended gate field-effect transistor (SSGFET) array-based <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${z}$ </tex-math></inline-formula> -axis accelerometer with an enhanced detection range. The stepped gate electrode structure of SGFET aids in extending the stable driving range beyond 33.33% of the initial air gap. The stable driving range is extended to 50% of the initial air gap with ~90% increase in the pull-in voltage. Mechanical, electrical, and electromechanical analytical models are developed. These models are validated through microelectromechanical systems (MEMS) simulations using CoventorMP and transistor simulations in Synopsys TCAD. An SSGFET-based common source (CS) amplifier with diode-connected p-MOSFET load is designed and simulated in Cadence Virtuoso using the lookup table (LUT) approach. The <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$z$ </tex-math></inline-formula> -axis accelerometer exhibits a sensitivity of 38 (mV/g) with a supply voltage of 3.3 V for a dynamic range (DR) of ±6 g with the nonlinearity of about 5.3% comparedtoSGFETswith a planar gate electrode,whichcan detect up to ±4 g with the same sensitivity. The 3-dB bandwidth of the accelerometer is 412 Hz with a noise-limited resolution of 109.31 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu$ </tex-math></inline-formula> g/(Hz) <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1/2</sup> . This article also presents a detailed analysis of the relation between the number of gate fragments, the pull-in voltage, stable driving range, and the DR along with a feasible fabrication integration plan.