A Wideband and Low-Noise CMOS-Integrated X-Hall Current Sensor Operating in Current Mode
Sana Fatima Syeda, Marco Crescentini, Marco Marchesi, Pier Andrea Traverso, Aldo Romani
Abstract
Power electronic circuits are moving toward higher switching frequencies, exploiting the capabilities of novel devices, so as to shrink the dimension of the passive components. This trend demands sensors able to operate at such high frequencies. This article aims to demonstrate the broadband capability of a fully integrated CMOS current sensor based on the X-Hall approach and configured in current mode, by alleviating the impact of stray capacitive loading at the probe–readout interface. Current-mode operation enables the usage of a transimpedance amplifier (TIA) as a readout circuit, offering better bandwidth, noise, and power performance than conventional instrumentation amplifiers (IAs). The system exploits a common-mode (CM) control system to operate the submodules at different supply voltages, respectively, 5 V for the X-Hall probe to achieve high sensitivity, and 1.2 V for the readout to exploit the high transition frequency of transistors with reduced oxide thickness. A chip-on-board mounting limits the parasitic inductive effects on the host printed circuit board (PCB). The developed prototype achieves a maximum acquisition bandwidth of 12 MHz. With a power consumption of 11.46 mW and a resolution of 39 mA <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</sub> , it presents a sensitivity of 8% <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$T^{-1}$ </tex-math></inline-formula> and achieves an FoM of 569 MHz/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{A}^{2}$ </tex-math></inline-formula> mW, which is significantly higher than the current state-of-the-art hybrid Hall/coil solutions. The prototype is implemented in a 90-nm microelectronic process from STMicroelectronics and occupies a silicon area of 2.4 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .