Understanding and Controlling Band Alignment at the Metal/Germanium Interface for Future Electric Devices
Tomonori Nishimura
Abstract
Germanium (Ge) is a promising semiconductor as an alternative channel material to enhance performance in scaled silicon (Si) field-effect transistor (FET) devices. The gate stack of Ge FETs has been much improved based on extensive research thus far, demonstrating that the performance of Ge FETs is much superior to that of Si FETs in terms of the on-state current. However, to suppress the performance degradation due to parasitic contact resistance at the metal/Ge interface in advanced nodes, the reduction of the Schottky barrier height (SBH) at the metal/Ge interface is indispensable, yet the SBH at the common metal/Ge interface is difficult to control by the work function of metal due to strong Fermi level pinning (FLP) close to the valence band edge of Ge. However, the strong FLP could be alleviated by an ultrathin interface layer or a low free-electron-density metal, which makes it possible to lower the SBH for the conduction band edge of Ge to less than 0.3 eV. The FLP alleviation is reasonably understandable by weakening the intrinsic metal-induced gap states at the metal/Ge interface and might be a key solution for designing scaled Ge n-FETs.