Experimental demonstration of novel scheme of HZO/Si FeFET reservoir computing with parallel data processing for speech recognition

Eishin Nako, Kasidit Toprasertpong, Ryosho Nakane, Mitsuru Takenaka, Shinichi Takagi

20222022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)25 citationsDOI

Abstract

We propose a novel scheme of the reservoir computing using ferroelectric gate MOSFETs (FeFETs) in a parallel data processing manner and apply this scheme to speech recognition. The effectiveness of combining the time responses of the drain, source and substrate currents on the reservoir performance as well as that of the usage of pre-cycled devices on mitigation of the influence of the endurance characteristics is experimentally shown. Several ideas on the FeFET reservoir computing system such as optimization of the virtual node number per time step, analog/digital input waveform and combination of different frequency channels are introduced to enhance the accuracy of a speech recognition task. As a result, we experimentally demonstrate the classification accuracy of 95.9% in spoken digit recognition, which is comparable to that of a software reservoir.

Topics & Concepts

Reservoir computingComputer scienceWaveformScheme (mathematics)Task (project management)Node (physics)SoftwareSignal processingElectronic engineeringDigital signal processingSpeech recognitionComputer hardwareArtificial intelligenceEngineeringArtificial neural networkRadarSystems engineeringMathematical analysisStructural engineeringTelecommunicationsMathematicsProgramming languageRecurrent neural networkNeural Networks and Reservoir ComputingAdvanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices