An 800 nW Switched-Capacitor Feature Extraction Filterbank for Sound Classification
Daniel Augusto Villamizar, Dante G. Muratore, Jim Wieser, Boris Murmann
Abstract
This paper presents a 32-channel analog filterbank for front-end signal processing in sound classification systems. It employs a passive N-path switched capacitor topology to achieve high power efficiency and reconfigurability. The circuit's unwanted harmonic mixing products are absorbed by the machine learning model during training. To enable a systematic pre-silicon study of this effect, we develop a computationally efficient circuit model that can process large machine learning datasets on practical time scales. Measured results using a 130 nm CMOS prototype IC indicate competitive classification accuracy on datasets for baby cry detection (93.7% AUC) and voice commands (92.4% average precision), while lowering the feature extraction energy compared to digital realizations by approximately 2× and 10×, respectively. The 1.44 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> chip consumes 800 nW, which corresponds to the lowest normalized power per simultaneously sampled channel in recent literature.