Reliability Characteristics of a High Density Metal- Insulator-Metal Capacitor on Intel’s 10+ Process
Che-Yun Lin, Uygar E. Avci, M. A. Blount, R. Grover, J. Hicks, Rahim Kasim, Arun Chandra Kundu, C. Pelto, C. Ryder, A. Schmitz, Kanika Sethi, Dragos Seghete, D. J. Towner, Albert Welsh, J. R. Weber, C. Auth
Abstract
We present a high density MIM decoupling capacitor that enables improved microprocessor performance by providing robust on-chip power supply droop reduction. The MIM dielectric is fabricated using ALD-deposited HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> and HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -ZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> high-k dielectrics with PVD TiN electrodes. We achieve single MIM-cap densities of 37 fF/μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and 52 fF/μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> that meet reliability requirement for both 1.98 V and 1.26 V use conditions. The reliability of the HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -ZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> capacitor shows minimal voltage polarity dependence, which enables the use of multi-plate MIM-caps to increase capacitance density. We achieved a capacitance density of 141 fF/μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> with a four-plate configuration, representing a 3.5× improvement over the reported capacitance density on Intel's 14 nm process. In addition, the stack meets environmental stress tests. This MIM- cap improves the on-chip power delivery network, leading to an increase in maximum frequency of microprocessors and is now shipping in volume.