A 50-V 50-MHz High-Noise-Immunity Capacitive-Coupled Level Shifter With Digital Noise Blanker for GaN Drivers
Yao Qin, Xin Ming, Zhi-Yi Lin, Zi-Kai Ye, Jiawei Shi, Chun-wang Zhuang, Zhaoji Li, Bo Zhang
Abstract
In this paper, a high-noise-immunity capacitive-coupled level shifter with digital noise blanker (DNB) is presented for GaN drivers. During and after <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{d}V$ </tex-math></inline-formula> /dt transitions, the DNB blanks the common mode noise induced by <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{d}V$ </tex-math></inline-formula> /dt and converts the differential mode noise due to mismatch effect to common mode noise. This enables high <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{d}V$ </tex-math></inline-formula> /dt immunity of 200V/ns and high mismatch tolerance not less than 15%. Moreover, a dynamic discharge control (DDC) circuit prevents coupling capacitor from charging the floating power rail within a wide negative <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{d}V$ </tex-math></inline-formula> /dt transition range and achieves fast reset for high frequency operation. High speed, low power consumption and down to −5V negative floating power rail tolerance are also achieved. The proposed level shifter is fabricated in a 0.5- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> BCD process and occupies an active chip area of 0.051mm2. Experimental results confirm that the proposed level shifter works at 50V 50MHz, achieving power consumption of 27.3pJ/transition and 1.26ns average delay with a small figure of merit (5.5(pJ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\cdot $ </tex-math></inline-formula> ns)/( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}^{3}\cdot \text{V}$ </tex-math></inline-formula> )). The effect of the DDC is confirmed within negative <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{d}V$ </tex-math></inline-formula> /dt transition range of −5V/ns <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sim -50\text{V}$ </tex-math></inline-formula> /ns.