Intelligent Fault Location in MTDC Networks by Recognizing Patterns in Hybrid Circuit Breaker Currents During Fault Clearance Process
Dimitrios Tzelepis, Sohrab Mirsaeidi, Adam Dyśko, Qiteng Hong, Jinghan He, Campbell Booth
Abstract
In this article, a novel, learning-based method for accurate location of faults in multiterminal direct current (MTdc) networks is proposed. By assessing the dc circuit breaker currents during the fault clearance process, a pattern recognition approach is adopted from which the fault location is estimated. The implementation of the algorithm is allocated into three main stages, where similarity coefficients and weighted averaging functions (incorporating exponential kernels) are utilized. For the proposed algorithm, only a short-time window of data (equal to 6 ms) is required. The performance of the proposed method is assessed through detailed transient simulation using verified MATLAB/Simulink models. Training patterns have been retrieved by applying a series of different faults within an MTdc network. Simulation and experimental results revealed that the proposed scheme, first, can reliably determine the type of fault, second, can accurately estimate the fault location (including the cases of highly resistive faults), and, third, is practically feasible.